[LLVMdev] Named Register Implementation

[Renato Golin]

On 31 March 2014 17:01, Joerg Sonnenberger <joerg at britannica.bec.de> wrote:
> We don't have to assume anything in the frontend. It is really just a
> question of "do we already provide a way to map "target,regname" to
> "regno".

I couldn't find any. The current approach I'm trying is to:

SelectionDAGBuilder::visitIntrinsicCall()
    case Intrinsic::read_register: {
    setValue(&I, DAG.getNode(ISD::READ_REGISTER, sdl, TLI->getPointerTy(),
                             getValue(I.getArgOperand(0))));
    return 0;

And on the target:

ARMTargetLowering::LowerREAD_REGISTER(SDValue Op, SelectionDAG &DAG) const {
  SDLoc dl(Op);
  SDValue RegName = Op.getOperand(1);
  unsigned Reg = RegInfo->getRegisterByName(RegName);
  return DAG.getCopyFromReg(DAG.getEntryNode(), dl, Reg, MVT::i32);

I just need to implement getRegisterByName(SDValue), with the SDValue
being a pointer to char, converting that constant text into register
number by a StringSwitch with the valid options.

My current doubts:
 - How to get the actual text from the SDValue
 - How to warn on invalid register names back to the front-end without asserting

The idea of mapping it to regno at the SelectionDAGBuilder level would
introduce target-specific callbacks, which are not necessary because
the actual lowering is already target-specific.

getRegisterByName() can be hand-crafted (not TableGen'd) because we
only want to support a handful of registers and not the whole class of
super-registers, groups, etc.

cheers,
--renato