[LLVMdev] CodeGen RegisterCoalescer

[Lang Hames]

Hi Jonas,

> These operands are not supposed to be around… they are added a bit later
in the method.

I'm not quite sure what you mean here?

I think that assertion is there to catch the case where a rematerialized
instruction is implicitly clobbering the flags register, which is
fairly common. I don't think the coalescer knows how to deal with implicit
operands in general.

Are you able to tell us anything about the nature of the instruction (and
implicit use) that you're trying to rematerialize?

Cheers,
Lang.


On Wed, Jun 11, 2014 at 6:42 AM, Jonas Paulsson <jonas.paulsson at ericsson.com
> wrote:

>  Hi,
>
>
>
> I am a bit confused in the method
> RegisterCoalescer::reMaterializeTrivialDef().
>
>
>
> It seems that
>
>
>
> TII->reMaterialize(*MBB, MII, DstReg, SrcIdx, DefMI, *TRI);
>
>
>
> simply clones the instruction.
>
>
>
> In my case, some implicit use operands exist, so they are also added to
> the NewMI.
>
>
>
> This however, triggers the assert:
>
>
>
>   // NewMI may have dead implicit defs (E.g. EFLAGS for MOV<bits>r0 on
> X86).
>
>   // We need to remember these so we can add intervals once we insert
>
>   // NewMI into SlotIndexes.
>
>   SmallVector<unsigned, 4> NewMIImplDefs;
>
>   for (unsigned i = NewMI->getDesc().getNumOperands(),
>
>          e = NewMI->getNumOperands(); i != e; ++i) {
>
>     MachineOperand &MO = NewMI->getOperand(i);
>
>     if (MO.isReg()) {
>
>       assert(MO.isDef() && MO.isImplicit() && MO.isDead() &&
>
>              TargetRegisterInfo::isPhysicalRegister(MO.getReg()));
>
>
>
> These operands are not supposed to be around… they are added a bit later
> in the method.
>
>
>
> I don’t see any other targets handling these types of operands in their
> rematerialize() definitions. Should I override this and make sure that
> these implicit use ops are omitted?
>
> Or am I missing something?
>
>
>
> Thanks in advance,
>
>
>
> Jonas Paulsson
>
>
>
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