[LLVMdev] FPU cannot be compatible with -soft-float code on mips by llc

Tim Northover t.p.northover at gmail.com
Fri Jul 25 11:17:39 PDT 2014


On 25 July 2014 18:50, Jim Grosbach <grosbach at apple.com> wrote:
> It sounds like you want to support half (f16 in LLVM terms) as a storage
> only interchange format. AArch64 and X86 (among others) do the same thing.
> You shouldn’t need the “-soft-float” option or anything of that nature at
> all. That, as you’ve found, disables all hard float operations. There’s been
> some recent cleanup in how this is handled in LLVM that should help guide
> you in what the Mips backend needs to do. In particular, Tim Northover’s
> recent patch, r213374.

As well as what's in that commit,  you probably want to mark
ISD::FP16_TO_FP and ISD::FP_TO_FP16 as "Expand" in
MipsISelLowering.cpp. Then your implementations of "__gnu_..." should
be called for fp16 conversions, but not normal floating point
arithmetic.

Cheers.

Tim.




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