[LLVMdev] Implicit extension/truncation in backend

Johnny Val johnnydval at gmail.com
Thu Jul 24 02:45:39 PDT 2014


Hi,

The backend I am working on has various different register sizes
(i16,i32,i64). The datapath in the architecture is 64bit. When a register
is needed for an ALU operation, it is sign extended to the full 64bits, all
operations are carried out in 64bits and then the result is truncated to
the register size.

For example, if an A register is i16 and is loaded with -1 it's value would
be FFFF . If you were then to copy it's value to a B register of size i32
then it's value would be FFFFFFFF etc.

I'm a bit lost on what the idiomatic way to implement this in LLVM would
be.

Cheers,

Johnny
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