[LLVMdev] [llmdev] fail to process llvm generated assembly on windows/mingw32

Carl name.is.carl at gmail.com
Sun Jan 26 06:27:18 PST 2014

Hello guys,

I'm using llvm 3.3 on windows with mingw (triple: "i386-unknown-mingw32")
to compile IR code that my
program generates.

I do it in two phases: first I emit assembly code and then assemble it.

       TargetMachine targetMachine =

        targetMachine.emit(module, output,

        byte[] asm = output.toByteArray();
        asm = output.toByteArray();

        BufferedOutputStream oOut = new BufferedOutputStream(new

        targetMachine.assemble(asm, clazz.getClassName(), oOut);

(I use a java binding for llvm)

Unfortunately, the assemble call fails with the error:

org.robovm.llvm.LlvmException: java.io.PrintWriter:478:2: error:
unknown directive
java.io.PrintWriter:479:2: error: unknown directive
        .linkonce discard
java.io.PrintWriter:629:2: error: unknown directive
java.io.PrintWriter:630:2: error: unknown directive
        .linkonce discard
java.io.PrintWriter:818:2: error: unknown directive
java.io.PrintWriter:819:2: error: unknown directive
        .linkonce discard
java.io.PrintWriter:1008:2: error: unknown directive
java.io.PrintWriter:1009:2: error: unknown directive
        .linkonce discard
java.io.PrintWriter:1062:2: error: unknown directive
java.io.PrintWriter:1063:2: error: unknown directive
        .linkonce discard

Did you ever get that error?
The fact is I need to generate my code in two steps (emit
assembly and then assemble) because of some ASM processing that my program
later does (and that I commented out).
It is interesting to notice that if I generate the obj directly with
    targetMachine.emit(module, output, CodeGenFileType.ObjectFile);
the generation is OK.

(but then my program is unable to process the ASM, so that's not

More info about my llvm configuration:

LLVM (http://llvm.org/):
  LLVM version 3.3
  Optimized build with assertions.
  Built Aug  4 2013 (14:50:50).
  Default target: i686-w64-mingw32
  Host CPU: corei7-avx

  Registered Targets:
    aarch64  - AArch64
    arm      - ARM
    cpp      - C++ backend
    hexagon  - Hexagon
    mblaze   - MBlaze
    mips     - Mips
    mips64   - Mips64 [experimental]
    mips64el - Mips64el [experimental]
    mipsel   - Mipsel
    msp430   - MSP430 [experimental]
    nvptx    - NVIDIA PTX 32-bit
    nvptx64  - NVIDIA PTX 64-bit
    ppc32    - PowerPC 32
    ppc64    - PowerPC 64
    sparc    - Sparc
    sparcv9  - Sparc V9
    systemz  - SystemZ
    thumb    - Thumb
    x86      - 32-bit X86: Pentium-Pro and above
    x86-64   - 64-bit X86: EM64T and AMD64
    xcore    - XCore

Any idea what may be wrong?

-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20140126/af3d8d88/attachment.html>

More information about the llvm-dev mailing list