[LLVMdev] Artificial deps and stores

Hal Finkel hfinkel at anl.gov
Fri Jan 17 15:54:18 PST 2014

Andy, et al.,

In ScheduleDAGInstrs::buildSchedGraph, the code for handling stores has this:

      if (!ExitSU.isPred(SU))
        // Push store's up a bit to avoid them getting in between cmp
        // and branches.
        ExitSU.addPred(SDep(SU, SDep::Artificial));

This code does not seem to be in any way specific to compares; and in any case, at least on the PPC A2, scheduling stores in between the compare and the branch would not be a bad thing (because the core is in order, and the compare has a 2-cycle latency, so if there is nothing else to do, a store would not be a bad thing to put there).

Can you explain the motivation for this (why or for what it is bad), and what else it might do (aside from the commented cmp/branch pairing)? I'm wondering if we should make this target dependent.

Thanks again,

Hal Finkel
Assistant Computational Scientist
Leadership Computing Facility
Argonne National Laboratory

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