[LLVMdev] Possible error in docs.
t.p.northover at gmail.com
Mon Jan 13 02:54:45 PST 2014
> idiv divides (%EDX:%EAX) by it's argument (%ECX). As the code have only
> 32-bit argument it needs to be bit extended from %EAX to %EDX:%EAX.
> sar is arithmetic shift right so sar %EDX, 31 copy the bit sign to all
> bits of register.
That makes sense for sdiv (though we seem to use the cltd these days),
but the documentation does say "udiv". I've committed r199092,
correcting the sign and making it a hypothetical scenario since we
don't actually produce that code any more.
Thanks for telling us about this Maciej.
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