[LLVMdev] It seems like some bug in Alias Analysis While enable useAA()

[Yaorong lee]

Hi,
  An error instruction scheduling in post-ra schedule pass confused me a
lot, I hack the code,
and found that maybe some bug in Alias Analysis while enable useAA(). The
following is a
piece of IR I debuged:
*  EntryBB:*
*    ...*
*    1 %uBase16 = bitcast %union.VR_union* %uu_buf to [8 x i16]**
*    2 %arrayidx = bitcast %union.VR_union* %uu_buf to [8 x i16]**
*    3 store i16 -1, i16* %arrayidx, align 16*
*    4 %arrayidx2 = getelementptr inbounds [8 x i16]* %uBase16, i32 0, i32
1*
*    5 store i16 4660, i16* %arrayidx2, align 2*
*    ...(set the 128bit vector to uu_buf)*
*    6 %vecalign = bitcast %union.VR_union* %uu_buf to ppc_fp128*

*    ; load 128bit vector from uu_buf*
*    7 %data = load ppc_fp128* %vecalign, align 16*
*    ... *
*  ... (other Basic blocks)*

*  BB#4:*
*    8 store i16 1000, i16* %arrayidx, align 16*
*    9 store i16 1234, i16* %arrayidx2, align 16*
*    ... (set the 128bit vector to uu_buf)*
*    10 %vecalign = bitcast %union.VR_union* %uu_buf to ppc_fp128*

*    ; load 128bit vector from uu_buf*
*    11 %data = load ppc_fp128* %vecalign, align 16*
*     ....*
  According to my understanding, all the "store" instructons which set the
uu_buf (e.g. NO.9)
should be "PartialAlias" with the load uu_buf instruction (NO.11). But
after the "Codegen Prepare"
pass , the BB#4 will be transformed to something like:
*  BB#4:*
*    ...*
*    1 %sunkaddr = ptrto %union.VR_union uu_buf to i64*
*    2 %sunkaddr23 = add i64 %sunkaddr, 2*
*    3 %sunkaddr24 = inttoptr i64 %sunkaddr23, align 2*
*    4 store i16 1234, i16* %sunkaddr24, align 2*
*    ...*
*    5 %vecalign = bitcast %union.VR_union* %uu_buf to ppc_fp128*
*    6 %data = load ppc_fp128* %vecalign, align 16*
*    ...*
  The Alias Analysis will return "NoAlias" for the NO.6 instruction and
No.4 instruction (it should be PartialAlias).
Alias Analysis stop analysising on instruction NO.3, because %sunkaddr24 is
not a pointer!
  So, when the post-ra scheduler got "NoAlias" infomation, it would
schedule instruction like:
*  BB#4:*
*    ...*
*    1 %sunkaddr = ptrto %union.VR_union uu_buf to i64*
*    2 %sunkaddr23 = add i64 %sunkaddr, 2*

*    ; Error schedule the load instruction to this location*
    *6 %data = load ppc_fp128* %vecalign, align 16 *
*    3 %sunkaddr24 = inttoptr i64 %sunkaddr23, align 2*
*    4 store i16 1234, i16* %sunkaddr24, align 2*
*    ...*
*    5 %vecalign = bitcast %union.VR_union* %uu_buf to ppc_fp128*
*    ...*
  And this is an error scheduling!
  Has someone encountered this problem before?

Best Regards,
Yaorong Lee
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