[LLVMdev] most optimised and lowest level IR before machine codegen?

[Tim Northover]

Hi Yi,

> Can I assume that LLVM will not do any code transformation on this level of
> IR but directly translate this IR into MC?

There are a few passes that happen on IR even after this phase, but
not many. The idea is that they're the passes that are more
target-specific, though that's probably less true now than it was
before. Giving "-print-after-all" to llc currently lists at least some
of them.

(I suspect it's skipping Loop strength reduction for some reason, but
that definitely runs from llc).

> Is there any internal lower-level IR that LLVM uses during the machine code
> generation?

Yes, after those few IR passes, the code is converted to
MachineInstrs. The actual instructions are target-specific, and most
of them represent CPU instructions in 1:1 correspondence, but there
are a few pseudo-instructions there that may expand to more (or less).

Lots more passes run on that representation (register allocation and
scheduling being the most obvious). "-print-after-all" shows them too,
and the IR-equivalent at each stage.

Finally, the MachineInstrs get lowered to MCInsts and then printed and
discarded almost immediately (to the extent that MCInsts tend to only
exist on the stack; they don't stick around long enough to need heap
allocation).

Cheers.

Tim.