[LLVMdev] Generating code for target with immediate constant?

[Marcello Maggioni]

Usually what you would do is having load matching the pattern of a constant
or another solution is Custom Selecting (in ISelDAGToDAG) the ISD::Constant
and expanding it to your LoadImmediate instruction that takes as input a
TargetConstant (a kind of constant that skips selection).

You also need to make sure that none of your instructions that shouldn't
accept constants match constants in their patterns/custom selection

Cheers,
Marcello

2014-12-23 19:17 GMT-08:00 Thomson <lilotom at gmail.com>:

> To generate code for a target which doesn't have immediate constant as
> instruction operand, do I (the target specific back-end, XXXTarget) need to
> provide code to break up the SDNode with constant (like ISD::ADD $reg1, #1)
> to 2 SDNodes (ISD::LOAD $reg2, #1; ISD::ADD $reg1, $reg2) in my
> XXXTargetLowering::LowerOperation, or LLVM target-independent framework can
> do such transformation automatically with my instruction pattern definition?
>
> Thanks
> -Thomson
>
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