[LLVMdev] dmb ishld in AArch64

[Tim Northover]

> I guess it's because we disabled the integrated-asm, so it won't complain when compiling the kernel.

No, it's something different. The inline assembly (for whatever
reason) says to use a "dmb ishst" rather than an "stlr". I don't
actually think the reason is that important, it's just surprising
because I'd expect stlr to be more efficient.

> The problem is explained below, the reordering causes accessing to uninitialized data.

Exactly, I think the dmb is pretty much irrelevant here.

> The IR looks OK to me, the order is correct. I think the optimization is on machine code. The code is part of the insert_leaf_info function in net/ipv4/fib_trie.c

Thanks for the IR snippet (I agree, it does look like the order is
reasonable there), but it's not really enough to debug the problem. We
need an actual Module we can compile and examine to have a hope of
finding out what's going on.

Cheers.

Tim.