[LLVMdev] dmb ishld in AArch64

[Chengyu Song]

Sorry, should be "dmb ishst"

> On Dec 9, 2014, at 2:40 PM, Chengyu Song <csong84 at gatech.edu> wrote:
> 
> Hi,
> 
> I got an optimization problem (O1, O2) regarding memory barrier “dmb ishld”
> 
> I find in the test/CodeGen/AArch64/intrinsics-memory-barrier.ll , it’s stated that memory access around DMB should not be reordered, but when compiling the Linux kernel, I found load/store in
> 
> static inline void hlist_add_before_rcu(struct hlist_node *n,
>                    struct hlist_node *next)
> {
>    n->pprev = next->pprev;
>    n->next = next;
>    rcu_assign_pointer(hlist_pprev_rcu(n), n);
>    next->pprev = &n->next;
> }
> 
> can reordered, and causes kernel crash.
> 
> f94006a8  ldr x8, [x21,#8]
> f9000275  str x21, [x19]
> d5033abf  dmb ishst
> f9400669  ldr x9, [x19,#8]
> f9000668  str x8, [x19,#8] <==== reordered str
> f9000133  str x19, [x9]
> f90006b3  str x19, [x21,#8]
> 
> It should be:
> 
> f94006a8  ldr x8, [x21,#8]
> f9000668  str x8, [x19,#8]
> f9000275  str x21, [x19]
> d5033abf  dmb ishst
> f9400669  ldr x9, [x19,#8]
> f9000133  str x19, [x9]
> f90006b3  str x19, [x21,#8]
> 
> I guess it’s because "dmb ishst" is not checked/tested? Any quick way to fix this?
> 
> Thanks,
> Chengyu