[LLVMdev] instruction/intrinsic for segmented adressing

[Tim Northover]

> Not so disappointing the information you are telling me about AArch64. You
> get the point, do not care if they are called segment registers, or
> MyProposeRegisters, important is that I have them there for the duration of
> a fiber. Do you know, are they exhaustively used by linux for instance?

There are two of them (readable from user space): TPIDR_EL0 and
TPIDRRO_EL0. The first is exclusively claimed by Linux for TLS, the
second is unused (as far as I know) but only writable by the kernel
(RO == read-only).

Incidentally, there's no way to directly control either of these in LLVM.

> What about OSX? Anybody has any idea?

OS X uses a different system for TLS at the moment, but almost
certainly reserves the right to do whatever it pleases with the
segment registers at a future date.

> In terms of CPU time, what would be the overhead of using such "segmented"-addressing? Myself I assume almost zero. CPU cache related issues would probably not change or?

Probably fairly minimal in most cases (on x86). On ARM there is
definitely a cost.

Cheers.

Tim.