[LLVMdev] conditional assignment in selectionDAG
Soham.Chakraborty at amd.com
Tue Sep 17 02:10:14 PDT 2013
I am trying following transformation in X86 selection dag.
lhs = rhs; // lhs and rhs are f32
if(rhs == 0.0)
lhs = rhs;
lhs = rhs';
i.e. conditionally replace rhs by rhs'.
I guess it can be done using ISD::SELECT node(for float values)? In that case I have to create a condition node. Can you please suggest/refer to how to do so?
You may please suggest alternatives. Note that I want to perform this transformation on the selection dag during target lowering and hence prefer not to create any basicblock+instruction.
Thanks in advance.
"The search for truth is more precious than its possession."
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