[LLVMdev] Limit loop vectorizer to SSE

Renato Golin renato.golin at linaro.org
Tue Nov 12 07:34:34 PST 2013


On 12 November 2013 15:14, Frank Winter <fwinter at jlab.org> wrote:

> I am asking because the option 'force-vector-width' is too restrictive.
> I would like to leave open the possibility to use vector width 2.


I was about to say that, and you saved us both one cycle. ;)

What you could do is to force an architecture that doesn't have AVX, only
SSE. I'm not sure how to do that on the JIT, I suppose setting the Target
attributes would be enough. Nor I know what CPU string limits support to
SSE, but that should do it.

cheers,
--renato
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