[LLVMdev] Register allocation limitations

[Stavropoulos Nikos]

Hi Umesh,

thanks for answering.
i think i did not describe the problem well enough.
i have no problem with  the register that should be written.
lets say we have a madd instruction 
 madd D, R, S, T.
D : don't care
R : lets say it is R4
S : should be whatever register that has different mod(register,4) != 0 so
lets pick R7
T:  should be whatever register that has different mod(register,4) != 0
(because of R) and
     should be whatever register that has different mod(register,4) != 3
(because of S) so we have to pick someone
     with mod 1 or 2 so we can choose R5

is there a way to do it somehow without declaring different register
classes, some dynamic kind way?





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