[LLVMdev] Combining physical registers

[Jakob Stoklund Olesen]

On May 16, 2013, at 9:35 AM, Krzysztof Parzyszek <kparzysz at codeaurora.org> wrote:

> On 5/16/2013 11:17 AM, Jakob Stoklund Olesen wrote:
>> 
>> Would this TRI function solve your problem?
>> [...]
>>   ///
>>   ///   Covering = getCoveringLanes();
>>   ///   MaskA = getSubRegIndexLaneMask(SubA);
>>   ///   MaskB = getSubRegIndexLaneMask(SubB);
>>   ///
>>   /// If (MaskA & ~(MaskB & Covering)) == 0, then SubA is completely covered by
>>   /// SubB.
>>   unsigned getCoveringLanes() const { return CoveringLanes; }
> 
> Yes, this would solve my problem.  I'm assuming that if I have subregisters Sub0..SubN (where Sub0 could be 0, i.e. the register itself), and corresponding masks Mask0..MaskN, and
>  Mask0 & ~((Mask1|Mask2|..|MaskN) & Covering) == 0,
> this will imply that the subregisters Sub1..SubN cover Sub0.

That’s right.

Currently, there is no way of getting the lane mask of the register itself, only sub-registers have lane masks.

However, getSubRegIndexLaneMask(0) returns ~0u, and any unused lanes are returned as ‘1’ in getCoveringLanes(), so it should all work out.

/jakob