[LLVMdev] Predicated Vector Operations
nrotem at apple.com
Wed May 8 21:16:19 PDT 2013
> I'm not sure I understand the full impact of this example, and I would like to.
> What are the desired memory model semantics for a masked store? Specifically, let me suppose a simplified vector model of <2 x i64> on an i64-word-size platform.
I brought the example in this email thread to show that the optimizations that we currently have won't work on masked load/store operations because they don't take the mask into consideration. The memory model interesting question but I am not sure how it is related. In our example you can see the problem with a single thread. Both MIC and AVX have masked stores operations and they have a different memory model.
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