[LLVMdev] Adding ARM UDF / UND instruction to TableGen
gkeiser at arxan.com
Fri Mar 29 18:14:45 PDT 2013
I'm preparing a patch which adds the general form of the "permanently undefined" instruction (A8.8.247) to ARM TableGen for disassembly purposes. I've placed it below the TRAP variants already defined, and those are decoded in preference to it, so that isn't an issue, and it has no pattern so should never occur during codegen. It seems as though none of the gas versions I've tried know this mnemonic; Microsoft's armasm from VS 2012 (which I believe is based heavily on ARM's assembler) recognizes both UDF and UND for this instruction. IDA 6.4 disassembles it as UND. The current manual says UDF.
Does anyone have a preference for this? I'm planning on making the default disassembly string UND since it's the most common in my limited sample, and adding an alias of UDF for assembly purposes. Do any other assemblers even recognize this instruction by name?
Software Development Engineer
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