[LLVMdev] [PATCH] RegScavenger::scavengeRegister
hfinkel at anl.gov
Mon Mar 25 14:15:07 PDT 2013
----- Original Message -----
> From: "Jakob Stoklund Olesen" <stoklund at 2pi.dk>
> To: "Akira Hatanaka" <ahatanak at gmail.com>
> Cc: "LLVM Developers Mailing List" <llvmdev at cs.uiuc.edu>, "Hal Finkel" <hfinkel at anl.gov>
> Sent: Monday, March 25, 2013 3:06:16 PM
> Subject: Re: [LLVMdev] [PATCH] RegScavenger::scavengeRegister
> On Mar 25, 2013, at 12:04 PM, Akira Hatanaka <ahatanak at gmail.com>
> > This patch adds parameter "EliminateFI" to
> > RegScavenger::scavengeRegister, which tells register scavenger not
> > to eliminate frame index of the emergency spill slot if set to
> > false.
> > I have pseudo load, store and copy instructions which are generated
> > during register allocation and expanded post-RA but before the
> > final stack size is known. I use register scavenger to search for
> > a temporary integer GPR that is used during pseudo-expansion.
> > This is what happens during pseudo-expansion:
> > The following pseudo
> > LoadAC $acc, FI // Pseudo load instructions. Load from FI to
> > accumulator $acc.
> > is expanded into this sequence:
> > LW $reg, FI // load from FI to temporary GPR $reg
> > MTLO $reg // copy $reg to register LO
> > LW $reg, FI + 4 // load from FI+4 to GPR $reg
> > MTHI $reg // copy $reg to register HI
> Hi Akira,
> The register scavenger is not really supposed to be used in more than
> one pass, because you would need to allocate a separate emergency
> spill slot for each pass.
> I think Hal is trying to solve a very similar problem for PPC.
> Hal, are you expanding pseudos during PEI?
In part, yes. It is for eliminating FIs and expanding some pseudos for spilling registers that don't have direct load/store instructions.
More information about the llvm-dev