[LLVMdev] Problems with 64-bit register operands of inline asm on ARM
mans.rullgard at linaro.org
Wed Mar 13 11:15:44 PDT 2013
Renato Golin <renato.golin at linaro.org> writes:
> On 13 March 2013 13:43, Måns Rullgård <mans at mansr.com> wrote:
>> One possible fix, which I have tested, is to look for the specific
>> instructions requiring such a pair (LDRD/STRD and LDREXD/STREXD) in
>> addition to the 'H' modifier. However, there are probably other
>> creative ways in which inline asm might rely on the specific pairing.
> Hi Mans,
> Either that method is ignoring an inline asm parser or there isn't one, but
> I agree, we should be able to have something better than just grep for
> possible extensions for paired registers.
>> Thus I believe the safest solution is to always force 64-bit operands
>> into even/odd pairs for any inline asm. In other words, we should
>> probably do something like this (untested):
> I tested this, and it fails on other inline assembly tests. I think that
> the non-paired asm is correctly selected by the table generated parser, but
> when you pair things that didn't need pairing, the parser goes bad.
> I don't think we should force pairing on every inline assembly either.
> Maybe someone knows how to parse inline assembly in a better way than it is
> currently being done? If there isn't any, than possibly creating a function
> to return "needsPairedRegister()" or something would still be ugly, but
> better than incrementing it inline.
Yes, ideally we should be able to look at the inline assembly and
determine, for each operand, whether it requires pairing. The problem
is that gcc _always_ allocates an even/odd pair, and I don't want to
attempt enumerating and detecting every possible way this could be
relied on. Searching for LDRD-family instructions is one thing, but I'm
sure there are other ways code could rely on the way gcc allocates
mans at mansr.com
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