[LLVMdev] parallel loop metadata simplification
ben.langmuir at intel.com
Mon Mar 4 09:05:12 PST 2013
> BTW I noted Clik Plus has actually two different parallel loop constructs.
> Have you, Cilk Plus developers, thought about the parallel loop code generation yet?
We've started thinking about the parallel loop code generation, but so far mostly about cilk_for, which is the task-parallel loop construct. For cilk_for loops, we intend to outline the loop into a function in Clang using a captured statement (described here: http://lists.cs.uiuc.edu/pipermail/cfe-dev/2013-January/027540.html).
For #pragma simd (vector-parallel loop), the hope is that we can use the parallel loop metadata in the same way that Paul is implementing #pragma ivdep. There will also be some extra pieces needed to implement the clauses that #pragma simd allows, such as vectorlength (specifies the maximum simd width). However, #pragma simd is otherwise very similar to ivdep, and we expect the codegen to be similar.
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