[LLVMdev] AESOP autoparallelizing compiler

Timothy Mattausch Creech tcreech at umd.edu
Sun Mar 3 06:41:32 PST 2013

Hi Jiong,
  I actually work day-to-day with Tilera processors and I was very pleased to see your recent mail about the TileGx patch! I have access to a Tile-Gx 8036 myself and am certainly planning to add native TileGx support to AESOP in the near future. (Shouldn't be hard: mostly it will require us to finally upgrade from LLVM 3.0 and compile our runtime dependencies for it.) I expect that we will use Tilera's own barrier implementations (in libtmc) directly in our codegen.


On Sun, Mar 03, 2013 at 03:01:23PM +0800, Jiong Wang wrote:
> On 03/03/2013 02:09 PM, Timothy Mattausch Creech wrote:
> >Hi,
> >  We would like to inform the community that we're releasing a version of our research compiler, "AESOP", developed at UMD using LLVM. AESOP is a distance-vector-based autoparallelizing compiler for shared-memory machines. The source code and some further information is available at
> >
> >  http://aesop.ece.umd.edu
> >
> >The main components of the released implementation are loop memory dependence analysis and parallel code generation using calls to POSIX threads.
>    Interesting ! I happen to finish the initial TileGX backend
> support, which is a many core processor. I am looking forward to
> testing AESOP on TileGX silicon.
> ---
> Regards,
> Jiong
> >Since we currently have only a 2-person development team, we are still on LLVM 3.0, and some of the code could use some cleanup. Still, we hope that the work will be of interest to some.
> >
> >We would welcome any feedback, comments or questions!
> >
> >Thanks,
> >Tim Creech
> >_______________________________________________
> >LLVM Developers mailing list
> >LLVMdev at cs.uiuc.edu         http://llvm.cs.uiuc.edu
> >http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev
> -- 
> Regards,
> Jiong. Wang
> Tilera Corporation.

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