[LLVMdev] Help with promotion/custom handling of MUL i32 and MUL i64
t.p.northover at gmail.com
Wed Jul 31 03:56:27 PDT 2013
> I think you should register custom type promotion logic, see
> LegalizeIntegerTypes.cpp, line 40. When this gets passed a 32
> bit multiplication, it should promote it to a 64 bit operation
> using the target specific node that does your special multiplication.
I think that's what he's doing.
> SDValue LHS = Op.getOperand(0);
> SDValue RHS = Op.getOperand(1);
> LHS = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i64, LHS);
> RHS = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i64, RHS);
> return DAG.getNode(XXXISD::MUL32, Op->getDebugLoc(), MVT::i64,
> LHS, RHS);
I think you should return an ISD::TRUNCATE of that MUL32. The truncate
is only temporary and will be removed when the ADD you refer to later
gets promoted, but it keeps the types correct in the interim (you
don't have an "i32 add" of an i64 and an i32 and allows the legalizer
to register your MUL32 as the promoted value.
> When you say that I'll have to take care of the node elsewhere, does that
> mean in defining it as a proper way to lower? Like below?
Either lower it as you're talking about or select it from your
InstrInfo.td if there's an actual instruction that will do the work.
> I would have thought that there was a default path for any XXXISD operation?
There's no default path for target-specific nodes. LLVM can't possibly
know what they're supposed to be.
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