[LLVMdev] Vector DAG Patterns

[Conor Mac Aoidh]

To elaborate, it is not only cumbersome writing these patterns for 
vectors of 16 characters (v16i8), it does not work.

When I compile with this pattern for an andx operation on v16i8:

/[(set RC:$dst,//
//  (and (i8 (vector_extract(vt VC:$src), 0 ) ), //
//    (and (i8 (vector_extract(vt VC:$src), 1 ) ),//
//        (and (i8 (vector_extract(vt VC:$src), 2 ) ),//
////(and (i8 (vector_extract(vt VC:$src), 3 ) ),//
//              (and (i8 (vector_extract(vt VC:$src), 4 ) ),//
//                (and (i8 (vector_extract(vt VC:$src), 5 ) ),//
//                  (and (i8 (vector_extract(vt VC:$src), 6 ) ),//
//                    (and (i8 (vector_extract(vt VC:$src), 7 ) ),//
//                      (and (i8 (vector_extract(vt VC:$src), 8 ) ), //
//                         (and (i8 (vector_extract(vt VC:$src), 9 ) ),//
//                            (and (i8 (vector_extract(vt VC:$src), 10 ) 
),//
//                                (and (i8 (vector_extract(vt VC:$src), 
11 ) ),//
//                                  (and (i8 (vector_extract(vt 
VC:$src), 12 ) ),//
//                                    (and (i8 (vector_extract(vt 
VC:$src), 13 ) ),//
//                                      (and (i8 (vector_extract(vt 
VC:$src), 14 ) ),//
//                                        (i8 (vector_extract(vt 
VC:$src), 15 ) )//
//                                      )//
//                                    )//
//                                 )//
//                            )//
//                        )//
//                     )//
//                  )//
//                )//
//              )//
//            )//
//          )//
//        )//
//      )//
//    )//
//  )//
//)]/

llvm-tblgen enters an infinite loop which never stops (i left it for ~10 
mins before killing)

So either there is another way to express this pattern, or this is a 
problem with tablegen?

Regards
---
Conor Mac Aoidh

On 23/07/2013 12:03, Conor Mac Aoidh wrote:
> Hi All,
>
> Been having a problem constructing a suitable pattern to represent 
> some vector operations in the DAG. Stuff like andx/orx operations 
> where elements of a vector are anded/ored together.
>
> My approach thus far has been to extract the sub elements of the 
> vector and and/or those elements. This is ok for 4 vectors of i32s, 
> but becomes cumbersome for v16i8s. Example instruction:
>
> andx $dst $v1
>
> Pattern:
>
> [(set RC:$dst,
>    (and (i32 (vector_extract(vt VC:$src), 0 ) ),
>        (and (i32 (vector_extract(vt VC:$src), 1 ) ),
>            (and (i32 (vector_extract(vt VC:$src), 2 ) ),
>                 (i32 (vector_extract(vt VC:$src), 3 ) )
>            )
>        )
>     )
> )]
>
> Is there a better way to do this?
>
> Regards
> ---
> Conor Mac Aoidh

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