[LLVMdev] emitPseudoInstruction with MCJIT on LLVM 3.2 for ARM

[David Sheffield]

Hi all,
   I was wondering if anyone could help me out with my MCJIT bug on LLVM 
3.2. The same code works beautifully on x86 desktop with the same 
version of LLVM. This is the error I've been getting on ARM platforms:

dsheffie at tegra-ubuntu:~/projects/threeFingeredJack/python_compile$ 
python ./vvadd.py
[ 0.  0.  0. ...,  0.  0.  0.]
ARMCodeEmitter::emitPseudoInstruction
UNREACHABLE executed at 
/home/dsheffie/llvm/llvm-3.2.src/lib/Target/ARM/ARMCodeEmitter.cpp:843!
Stack dump:
0.      Running pass 'ARM Machine Code Emitter' on function 
'@tramp_4002416'
Aborted

I'm running on Ubuntu 12.04 (hard float) on a quad-core nvidia Tegra3 
(4x cortex-a9) I've included my configure command. Am I misconfiguring 
LLVM for my system, have I done something incredibly stupid, or is 
something else going on?

I've configured llvm 3.2 with the following command:
"../configure --prefix=/opt/local --enable-shared --enable-jit 
--enable-targets=host --disable-optimized --enable-assertions"

Many thanks in advance,

david
-------------- next part --------------
; ModuleID = '4002416.bc'

define void @tramp_4002416(i8* %fp, float** %args, i32 %n) {
"4002416entry":
  %0 = bitcast i8* %fp to void (float*, float*, float*)*
  %1 = getelementptr float** %args, i32 0
  %load_0 = load float** %1
  %2 = getelementptr float** %args, i32 1
  %load_1 = load float** %2
  %3 = getelementptr float** %args, i32 2
  %load_2 = load float** %3
  call void %0(float* %load_0, float* %load_1, float* %load_2)
  ret void
}
-------------- next part --------------
; ModuleID = 'vvadd.bc'

define void @vvadd(float* noalias %y, float* noalias %a, float* noalias %b) {
vvaddentry:
  br label %smLoopi

smLoopi:                                          ; preds = %smLoopi, %vvaddentry
  %i1 = phi i32 [ 0, %vvaddentry ], [ %nexti, %smLoopi ]
  %0 = getelementptr float* %y, i32 %i1
  %1 = getelementptr float* %a, i32 %i1
  %vector_ld_ptr = bitcast float* %1 to <16 x float>*
  %2 = load <16 x float>* %vector_ld_ptr, align 1
  %3 = getelementptr float* %b, i32 %i1
  %vector_ld_ptr2 = bitcast float* %3 to <16 x float>*
  %4 = load <16 x float>* %vector_ld_ptr2, align 1
  %5 = fadd <16 x float> %2, %4
  %vector_st_ptr = bitcast float* %0 to <16 x float>*
  store <16 x float> %5, <16 x float>* %vector_st_ptr, align 1
  %nexti = add i32 %i1, 16
  %condTesti = icmp slt i32 %nexti, 1024
  br i1 %condTesti, label %smLoopi, label %firstTermi

secondTermi.loopexit:                             ; preds = %smCleanUpi
  br label %secondTermi

secondTermi:                                      ; preds = %firstTermi, %secondTermi.loopexit
  ret void

firstTermi:                                       ; preds = %smLoopi
  %preCondTest = icmp eq i32 %nexti, 1024
  br i1 %preCondTest, label %secondTermi, label %smCleanUpi.preheader

smCleanUpi.preheader:                             ; preds = %firstTermi
  br label %smCleanUpi

smCleanUpi:                                       ; preds = %smCleanUpi, %smCleanUpi.preheader
  %i3 = phi i32 [ %cNexti, %smCleanUpi ], [ 1024, %smCleanUpi.preheader ]
  %6 = getelementptr float* %y, i32 %i3
  %7 = getelementptr float* %a, i32 %i3
  %8 = load float* %7
  %9 = getelementptr float* %b, i32 %i3
  %10 = load float* %9
  %11 = fadd float %8, %10
  store float %11, float* %6
  %cNexti = add i32 %i3, 1
  %condTesti4 = icmp slt i32 %cNexti, 1024
  br i1 %condTesti4, label %smCleanUpi, label %secondTermi.loopexit
}