[LLVMdev] What would cause instructions to NOT make it into the module?
Caldarale, Charles R
Chuck.Caldarale at unisys.com
Wed Jan 23 22:06:33 PST 2013
> From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu]
> On Behalf Of Sean Silva
> Subject: Re: [LLVMdev] What would cause instructions to NOT make it into the module?
> It is a pass that can be run like any other pass. See createVerifierPass().
You can also just call verifyModule() with the appropriate parameters; it's defined in include/llvm/Analysis/Verifier.h.
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