[LLVMdev] What would cause instructions to NOT make it into the module?
rmann at latencyzero.com
Wed Jan 23 18:06:53 PST 2013
As i've been adding to my code generation phase, calling various LLVM APIs, I often dump the module to see how things are progressing. Suddenly, somewhere I've made a change that keeps the code I'm generating from actually appearing in the module. What might cause that? I'm not tripping any asserts or getting other errors.
I can dump the individual instructions and they look good, but if I dump the module, I don't see any of them.
Any idea what's causing this?
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