[LLVMdev] [X86] DAG Combine - VSELECT

[Juergen Ributzka]

Unfortunately not :-( By that time SETCC has already been lowered to a sequence of several instructions and a target specific X86ISD Compare Node. Finding the SETCC/VSELECT pattern early on in DAG Combine before SETCC has been lowered is easier and also simpler to match.

Cheers,
Juergen
 
On Aug 20, 2013, at 12:13 AM, Demikhovsky, Elena <elena.demikhovsky at intel.com> wrote:

> Can this optimization be moved to the lowering phase? LowerVSELECT() ?
>  
> -           Elena
>  
> From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] On Behalf Of Eli Friedman
> Sent: Tuesday, August 20, 2013 03:56
> To: Juergen Ributzka
> Cc: Benjamin Kramer; LLVM Developers Mailing List
> Subject: Re: [LLVMdev] [X86] DAG Combine - VSELECT
>  
> On Mon, Aug 19, 2013 at 4:17 PM, Juergen Ributzka <juergen at apple.com> wrote:
> I see. We still can use that shortcut to catch the simple case after type legalization, but we could also do a more elaborate type check before type legalization to enable it?
>  
> If you're going to write the code to check the types anyway, it's probably clearer to remove the isBeforeLegalize check.
>  
> -Eli
>  
> On Aug 19, 2013, at 4:13 PM, Eli Friedman <eli.friedman at gmail.com> wrote:
> 
> 
> On Mon, Aug 19, 2013 at 3:34 PM, Juergen Ributzka <juergen at apple.com> wrote:
> Hi @ll,
> 
> I am wondering about the use of !isBeforeLegalize in PerformSELECTCombine in the X86 backend. This defers all VSELECT related DAG combines until after the Legalizer has run. If the IR has already only legal types the second round of DAG combines is skipped and no VSELECT specified optimizations are performed at all.
> 
> Is there a reason we don’t run the X86 DAG combiner before Type Legalization?
>  
>  I think the code in question is using isBeforeLegalize as a shortcut for "are all the operand and result types legal".
>  
> -Eli 
>  
>  
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