[LLVMdev] is there any passes or compiling options that can aviod to generate vector instructions and 'select' instruction in IR

[Duncan Sands]

Hi,

> is there any passes or compiling options that can aviod to generate vector
> instructions and 'select' instruction in IR.
> i think that these instructions can be replaced with other instructions in
> LLVM IR. So if there is a way to eliminate these instructions during
> compilation?

you can avoid having optimizers create vector instructions by not running
the vectorizer pass.  However select is harder to avoid because it is created
by fundamental optimization passes that you have to run to get good code.
Also, front-ends might create them directly.  Why do you want to avoid "select"?

Ciao, Duncan.