[LLVMdev] Generate addi 40, r3 instruction

[Stavropoulos Nikos]

>def ADDI : F1<opcode, (outs IntRegs:$dst), (ins IntRegs:$dst, i32imm:$imm) 
>                      "addi $imm, $dst", 
>                      [(set $IntRegs:$dst, (add $IntRegs:$dst, i32imm:$c))] 

 
when we give an immediate in the string we give the same name so in the
third line use imm instead of c
in the third line we do not put $ prefix in front of Register class so your
third line should be 

                     [(set IntRegs:$dst, (add IntRegs:$dst, i32imm:$imm))] 




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