[LLVMdev] Distinguish variadic register defines/uses in MCInstrDesc?

Christoph Grenz christophg+llvm at grenz-bonn.de
Mon Sep 24 18:39:46 PDT 2012


I'm currently working on a rich disassembler for some ARM/Thumb environment.
I wanted to keep most classes independent of the architecture, so I use 
MCInstrInfo and MCInstrAnalysis to find branch instructions (and other 
instructions writing to the program counter) and to differentiate between 
register definitions and uses to track all instructions the branch depends on.

This works well for most cases, except if there are Thumb pop instructions 

Pop has a variable number of output registers, so MCInstrDesc::getNumDefs 
returns zero and, as far as I can see, in the tablegen files 'variable_ops' is 
always in the 'ins' list and MCInstrDesc only provides isVariadic();

My current workaround is to assume that all variadic arguments of instructions 
that have zero register definitions but are marked as mayLoad are register 
definitions. I'm not very happy with this solution.

Is it possible to extend LLVM to check if 'variable_ops' is in 'ins' and/or 
'outs' in tablegen, so that MCInstrDesc could provide something like 
hasVariadicDefs() and hasVariadicUses()?

That way handling variadic instructions when disassembling would be much 
easier and only instructions with variadic uses and defines would need 
explicit special casing - if they even exist.


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