[LLVMdev] mips16 puzzle
resistor at mac.com
Thu Sep 20 23:03:22 PDT 2012
It's not clear to me that you need to do anything special here. If you define your MIPS16 register class as not containing SP, then any MIPS16 instructions that get selected and want to read from SP should get a COPY inserted from SP to a MIPS16 vreg. The coalescer should, ideally, get rid of extraneous copies for you.
On Sep 20, 2012, at 10:48 PM, Reed Kotler <rkotler at mips.com> wrote:
> Trying to think of a clever way to do something....
> On Mips 16, the SP (stack pointer) is not a directly accessible register in most instructions.
> There is a way to move to and from mips 16 registers (subset of mips32) and mips32 registers.
> For the load/store word instructions, there are forms which implicitly take SP.
> However, for store/load byte and store/load halfword, there is no such instruction.
> In such cases, if I were writing assembly language code, I would move SP to a mips 16 register and then use it to do the store/load byte/haflword.
> It also then becomes a common subexpression because there may be multiple such accesses.
> It's like a temporary register alias.
> Add, Sub also have a way to reference memory using mips16 registers as a base address, so various operators on stack data are simplified.
> Any thoughts?
> Many ways to do this but I like simple ways. :)
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