[LLVMdev] Need Help Understanding Operands in X86 MachineFunctionPass
criswell at illinois.edu
Tue Sep 11 07:57:53 PDT 2012
I'm working on an X86 MachineFunctionPass that adds prefetch
instructions to a function. I have code that adds a "prefetchnta
<constant address>" instruction to x86 32-bit code. What I want to do
is to add a "prefetchnta <constant address>" instruction to x86_64 code.
The code for adding the 32-bit instruction is:
The code above doesn't work for x86_64, so I think I need to change the
operands to the instruction. However, I have no idea what the different
register and immediate arguments to this instruction represent. Do they
somehow encode the Mod/RM bits used in x86 instruction encoding? Are
they offset and register operands? I've checked the TableGen files, but
their meaning appears cryptic to me.
Can someone explain to me what these operands are meant to represent?
Thanks in advance,
-- John T.
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