[LLVMdev] micro mips/mips32
rkotler at mips.com
Wed Sep 5 21:45:27 PDT 2012
The problem is that everything about the mips32 and micro mips 16
instruction is the same, aside from the encoding in to binary.
Seems like maybe we need to extend the notion of an instruction so that
it can have alternate encodings depending on subtarget.
On 09/05/2012 08:28 PM, Jim Grosbach wrote:
> The instructions are defined by their encodings, not the assembly syntax. You want separate instruction definitions for the different encodings and select. Between them in the assembler via sub target features. See ARM handling of thumb vs thumb2 vs arm for examples of how to do this.
> On Sep 5, 2012, at 6:59 PM, reed kotler<rkotler at mips.com> wrote:
>> The micro mips processor assembly language is basically 100% the same as mips32/mips64.
>> There are some assembler directives you add but for a base port, but that is all you need to do.
>> However, the binary instruction encoding is entirely different. There are a combination of 16 and 32 bit instruction encodings.
>> The question is, what's the best way to handle this?
>> Extending tablegen ?
>> You would want a single instruction to have multiple encodings dependent on the current mode we are compiler for.
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>> LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu
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