[LLVMdev] Predication on SIMD architectures and LLVM
nrotem at apple.com
Tue Oct 23 21:29:24 PDT 2012
On Oct 22, 2012, at 10:15 AM, dag at cray.com wrote:
> It's true that a target-independent predicated IR isn't going to
> translate well to a target that doesn't have predication. However, for
> targets that do it's a godsend.
Even for MIC (Xeon Phi), the predicated IR is not necessary. The instructions that really benefit from predication are loads and stores. MIC masks are write masks, but even if they were to help the performance of predicated instructions, there are other ways to do this. One way would be to implement masked load and mask store intrinsics, and to place 'select' instructions in strategic locations: before instructions that may fault, before phi-nodes, etc. A pre-register allocation pass can propagate the masks to all of the instructions that need them. But this is theoretical since only load/store really benefit from predication.
> Yep. This is why I think IR support is essential.
I don't think that we need to change the IR, even for a predicated architecture such as MIC .
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