[LLVMdev] Debugging/Fixing 'Interval not live at use' errors
stephen.mcgruer at gmail.com
Tue Oct 23 11:02:50 PDT 2012
Thanks for the suggestion. I ran verify-machineinstrs and found that I've
definitely been doing something wrong, for quite a while at least (I assume
that live interval analysis and the particular benchmark just happened to
expose it). Results are at http://pastebin.com/5zeUDVXK.
I'm not entirely sure what is wrong here - I assume it has something to do
with my 'special' instruction LDri_ab. This instruction is a load with an
'address writeback' - ld.ab r0, [r1, 5] is equivalent to ld r0, [r1]; add
r1, r1, 5. As it was very difficult to match such behaviour automatically,
I actually only generate them manually for prologue/epilogue emission, so
the tablegen def is like:
def LDri_ab : Pseudo<(outs CPURegs:$src), (ins MEMri:$addr),
I'm guessing that the warning is because such an instruction doesn't tell
LLVM what it uses nor what it kills? Is there a way I can do this?
Alternatively, if the reason is something else, I'd be happy to know that
On 23 October 2012 16:50, Jakob Stoklund Olesen <stoklund at 2pi.dk> wrote:
> On Oct 23, 2012, at 2:10 AM, Stephen McGruer <stephen.mcgruer at gmail.com>
> I have a target backend which is currently causing live interval analysis
> to throw 'Interval not live at use' errors for many of my benchmarks. I
> imagine that this is caused by missing information for my target (probably
> in the instructioninfo tablegen?), but I am having difficulties in both
> debugging and fixing this problem, and would appreciate any advice or help
> anyone can give.
> Probably, -verify-machineinstrs will tell you what's wrong.
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