[LLVMdev] Predication on SIMD architectures and LLVM
marcello at codeplay.com
Fri Oct 19 08:38:29 PDT 2012
I'm working on a compiler based on LLVM for a SIMD architecture that
supports instruction predication. We would like to implement branching
on this architecture using predication.
As you know the LLVM-IR doesn't support instruction predication, so I'm
not exactly sure on what is the best way to implement it.
We came up with some ways to do it in LLVM:
- Do not add any predication in the IR (except for load and stores
through intrinsics), linearize the branches and substitute PHI nodes
with selects for merging values . In the backend then we would custom
lower the select instruction to produce a predicated mov to choose the
right version of the value. I think this option doesn't make use of the
possible benefits of the architecture we are targeting at all.
- Another way could be adding intrinsics for all instructions in the
target to make them support predication, still linearize all the
branches, but use instruction predication instead of generating cmovs .
The backend then would custom lower almost any instruction into
predicated custom nodes that are matched through tablegen patterns. We
could generate these intrinsics in the same IR pass that linearizes
- Make a custom backend that actually directly outputs predicated
instructions (we really mainly only need one type of predicate , so
every instruction could use that kind of predicate ...) but I think this
is a nasty solution ...
Did someone already tried to do this in LLVM and if yes what solution/s
did you use to solve the problem?
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