[LLVMdev] Loop vectorizer

Duncan Sands baldrick at free.fr
Thu Oct 18 03:15:11 PDT 2012

Hi Ralf,

> On 10/17/12 9:43 AM, Hal Finkel wrote:
>>> I am currently working on a full re-implementation of the WFV
>>> algorithm
>>> on top of the latest trunk.
>>> One part of it that is basically finished is an analysis pass that I
>>> call "vectorization analysis", which annotates a function (WFV works
>>> on
>>> entire functions) with metadata used during control-flow to data-flow
>>> conversion and instruction vectorization.
>> Is there a reason to use metadata here as opposed to just keeping state in the
>> analysis pass?
> Yes, two practical ones:
> 1) I don't need to to maintain an additional instruction->properties mapping and
> I don't need a map lookup every time I want to check if a block/instruction has
> a certain property (which happens quite often).
> 2) For debugging purposes, I don't need to write my own AssemblyAnnotationWriter
> but all information is directly visible in the IR.

I know it is tempting to stock information in the IR but I'm not sure you
realize how expensive it is.  Your (1) makes me laugh, since adding and querying
metadata is going to be many times more expensive than a map lookup; and as for
(2) that's why analysis methods have a method for printing out the info they

Ciao, Duncan.

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