[LLVMdev] RegisterClass constraints in TableGen

Fraser Cormack frasercrmck at gmail.com
Thu Oct 11 03:44:14 PDT 2012

Excellent, I've implemented my own PBQP register allocator and solved the
issue very painlessly.

Now onto those more interesting problems!

Thanks for your suggestion,

On Fri, Oct 5, 2012 at 9:26 AM, Gergö Barany <gergo at complang.tuwien.ac.at>wrote:

> On Thu, Oct 04, 2012 at 16:20:53 +0100, Fraser Cormack wrote:
> > This architecture has two single-ported register files. Each instruction
> > can only read one operand from each register file, but can write to
> either.
> Even if you can't express this in TableGen, you should be able to use the
> PBQP register allocator with a custom PBQP problem builder. Other register
> allocators wouldn't be able to handle your architecture, but this would
> allow you to move on to (presumably) more interesting problems ;-)
> --
> Gergö Barany, research assistant
> gergo at complang.tuwien.ac.at
> Institute of Computer Languages
> http://www.complang.tuwien.ac.at/gergo/
> Vienna University of Technology                       Tel:
> +43-1-58801-58522
> Argentinierstrasse 8/E185, 1040 Wien, Austria         Fax:
> +43-1-58801-18598
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