[LLVMdev] Protecting a register value in the LLVM backend

Marcello Maggioni hayarms at gmail.com
Tue Oct 2 15:12:03 PDT 2012


Hi David,
can you point me to an instruction in the X86 architecture that uses this?

The MUL instruction would be a good example?

Thanks
Marcello

2012/10/2 <dag at cray.com>

> Marcello Maggioni <hayarms at gmail.com> writes:
>
> > I'm working on an LLVM backend for a new target architecture which has
> > some instructions that when executed implicitly produce a result in a
> > particular register after a certain amount of cycles.
> >
> > The situation is this :
> >
> > 1: Execute instruction
> > 2: Wait for result
> > 3: Wait for result
> > 4: Wait for result
> > 5: Read from register
> >
> > The value in the special register needs to be protected until the
> > execution of instruction number 5.
> > What I would like to do is to make it possible for the backend to
> > schedule instructions that don't mess with this special register in
> > anyway in-between the two Execute Instruction/Read register
> > instructions.
>
> Why doesn't the existing dependence and instruction itineraries support
> not work for this case?  X86 has all sorts of instructions that
> implicitly define registers and it handles this problem quite well.
>
>                              -David
>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20121002/7bfa538e/attachment.html>


More information about the llvm-dev mailing list