[LLVMdev] Protecting a register value in the LLVM backend
hayarms at gmail.com
Tue Oct 2 02:35:47 PDT 2012
I'm working on an LLVM backend for a new target architecture which has some
instructions that when executed implicitly produce a result in a particular
register after a certain amount of cycles.
The situation is this :
1: Execute instruction
2: Wait for result
3: Wait for result
4: Wait for result
5: Read from register
The value in the special register needs to be protected until the execution
of instruction number 5.
What I would like to do is to make it possible for the backend to schedule
instructions that don't mess with this special register in anyway
in-between the two Execute Instruction/Read register instructions.
How can I model this behavior in the LLVM backend? I know of the existence
of delay slots and one solution could be of adding delay slots for these
instructions and filling them with other instructions that don't mess with
this special register manually through a machine pass, but I was wondering
if there is another way of doing this that I don't know (I'm pretty new to
the backend stuff).
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