[LLVMdev] tablegen question

Reed Kotler rkotler at mips.com
Fri Mar 23 23:46:18 PDT 2012


According to the TableGen manual:

"Each def record has a special entry called "NAME." This is the name of 
the def ("ADD32rr" above). In the general case def names can be formed 
from various kinds of string processing expressions and NAME resolves to 
the final value obtained after resolving all of those expressions. The 
user may refer to NAME anywhere she desires to use the ultimate name of 
the def. NAME should not be defined anywhere else in user code to avoid 
conflict problems."

I agree that for multiclass it works more how you would expect it to.

So, I don't think that NAME should be ? as in the example I gave.

On 03/22/2012 11:28 PM, WANG.Jiong wrote:
>  From my understanding, NAME is a special builtin entry and dedicated for
> things related multiclass,
>
> So, is the following rewrite what you want?
>
> class Base<int V>  {
>     int Value = V;
> }
>
> class Derived<string Truth>  :
>     Base<!if(!eq(Truth, "true"), 1, 0)>;
>
> multiclass Derived_m<string T>  {
>    def #NAME# : Derived<T>;
> }
>
> defm TRUE : Derived_m<"true">;
> defm FALSE : Derived_m<"false">;
>
> tablegen result:
>
> ------------- Classes -----------------
> class Base<int Base:V = ?>  {
>    int Value = Base:V;
>    string NAME = ?;
> }
> class Derived<string Derived:Truth = ?>  {    // Base
>    int Value = !if(!eq(Derived:Truth, "true"), 1, 0);
>    string NAME = ?;
> }
> ------------- Defs -----------------
> def FALSE {    // Base Derived !strconcat(NAME, "")
>    int Value = 0;
>    string NAME = "FALSE";
> }
> def TRUE {    // Base Derived !strconcat(NAME, "")
>    int Value = 1;
>    string NAME = "TRUE";
> }
>
> ---
> Regards,
> WANG.Jiong
>
> On 03/16/2012 09:55 PM, Reed Kotler wrote:
>> Trying to resolve some general tablegen questions.
>>
>> Consider the test case for Tablegen called eq.td
>>
>> class Base<int V>  {
>>     int Value = V;
>> }
>>
>> class Derived<string Truth>  :
>>     Base<!if(!eq(Truth, "true"), 1, 0)>;
>>
>> def TRUE : Derived<"true">;
>> def FALSE : Derived<"false">;
>>
>> If I process this through tablegen I get:
>>
>> ------------- Classes -----------------
>> class Base<int Base:V = ?>  {
>>     int Value = Base:V;
>>     string NAME = ?;
>> }
>> class Derived<string Derived:Truth = ?>  {    // Base
>>     int Value = !if(!eq(Derived:Truth, "true"), 1, 0);
>>     string NAME = ?;
>> }
>> ------------- Defs -----------------
>> def FALSE {    // Base Derived
>>     int Value = 0;
>>     string NAME = ?;
>> }
>> def TRUE {    // Base Derived
>>     int Value = 1;
>>     string NAME = ?;
>> }
>>
>> Why is NAME=? in FALSE and TRUE.
>>
>> Shouldn't it be FALSE and TRUE ??
>>
>>
>> _______________________________________________
>> LLVM Developers mailing list
>> LLVMdev at cs.uiuc.edu         http://llvm.cs.uiuc.edu
>> http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev

-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20120323/b2944d2f/attachment.html>


More information about the llvm-dev mailing list