[LLVMdev] Stack alignment on X86 AVX seems incorrect

[Evandro Menezes]

Cameron,

Figure 3.3 on page 16 of www.x86-64.org/documentation/abi.pdf is not 
normative.  See foot note 7 in the same page.  Figure 3.4 on page 21 
confirms that the use of a frame-pointer is optional.

So, if one doesn't use ENTER in the prologue and uses RSP to access 
local variables, RBP may be used as a calee-saved GPR.

-- 
Evandro Menezes          Austin, TX          emenezes at codeaurora.org
Qualcomm Innovation Center, Inc is a member of the Code Aurora Forum


On 03/02/12 10:17, Cameron McInally wrote:
>     At least for 32bit x86 reserving another register as alternative frame
>     pointer is very heavy. The above would allow normal spill logic to
>     decide when to keep a reference in register and when not. It also reuses
>     existing functionality as much as possible.
>
>
> Hi Joerg,
>
> Yes, this was a problem in my implementation also. Empirically, for the
> chips I work on, reserving the extra frame register was shown to be a
> win. But, of course, I am sure this win is not universal.
>
> I did receive permission to share my work with the community. Although,
> without discovering a creative solution to the extra frame register
> problem, I doubt my patch would be wanted. If anyone is motivated to
> work out this issue, I would be happy to help.
>
> My current thinking is that an emergency spill slot could be set aside
> to hold the original, ABI conforming, frame pointer. Not an ideal
> solution, but in my situation where I must cover any code a user throws
> at me, breaking the ABI and playing with the stack is preferred.
>
> Thanks,
> Cameron
>
>
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