[LLVMdev] vector shuffle emulation/expand in backend?

[Ivan Llopard]

Hi Heikki,

You can look at SelectionDAGLegalize::ExpandNode() what the default 
expand implementation does for vector_shuffle nodes.
If it does not fit your needs, you may try to custom lower them.

Ivan.


Le 02/03/2012 09:50, Heikki Kultala a écrit :
> I'm having some troubles implementing vector support to our custom backend
>
> It seems that llvm cannot emulate shuffle with extracts, inserts and builds?
>
> I've enabled vector registers with
>
> addRegisterClass(MVT::v2i32, TCE::V2I32RegsRegisterClass);
> addRegisterClass(MVT::v2f32, TCE::V2F32RegsRegisterClass);
>
> and created patterns for most vector instructions, including insert,
> extract and build.
>
> I've tried to say
>
> setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v2i32, Expand);
> setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v2f32, Expand);
>
> but this does not seem to do anything, I still get
>
> LLVM ERROR: Cannot select: 0x1fde870: v2i32 = vector_shuffle 0x1fdda70,
> 0x1fdea80<1,0>  [ID=38]
>     0x1fdda70: v2i32 = add 0x1fddf70, 0x20540e0 [ORD=2811] [ID=37]
> ...
>
>     0x1fdea80: v2i32 = undef [ID=16]
>
>
> Is there some solution to this? Is this a bug or a feature?
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