[LLVMdev] How to define macros in a tablegen file?

Villmow, Micah Micah.Villmow at amd.com
Wed Jun 20 10:29:05 PDT 2012


Interesting, I'll have to look into that. I have some pretty big pattern files I would love to refactor into simpler patterns.

Micah

> -----Original Message-----
> From: Sebastian Pop [mailto:spop at codeaurora.org]
> Sent: Wednesday, June 20, 2012 10:27 AM
> To: Villmow, Micah
> Cc: llvmdev at cs.uiuc.edu
> Subject: Re: [LLVMdev] How to define macros in a tablegen file?
> 
> For reference, here is how the SPU port is using code and pattern
> fragments:
> 
> // Holder of code fragments (you'd think this'd already be in
> // a td file somewhere... :-)
> 
> class CodeFrag<dag frag> {
>   dag Fragment = frag;
> }
> 
> class I64SETCCNegCond<PatFrag cond, CodeFrag compare>:
>   Pat<(cond R64C:$rA, R64C:$rB),
>       (XORIr32 compare.Fragment, -1)>;
> 
> def : I64SETCCNegCond<setne, I64EQr64>;
> def : I64SELECTNegCond<setne, I64EQr64>;
> 
> 
> Sebastian
> --
> Qualcomm Innovation Center, Inc is a member of Code Aurora Forum






More information about the llvm-dev mailing list