[LLVMdev] non-SSA IR generation

amruth.rd at knights.ucf.edu amruth.rd at knights.ucf.edu
Wed Jun 13 13:17:54 PDT 2012

I am experimenting with LLVM optimizer and found that the bit code file clang emits is already in SSA form, but I want to generate it in non-SSA form. Would you let me know if there is any way of doing it? 
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