[LLVMdev] Predicate registers/condition codes question

Sebastian Pop spop at codeaurora.org
Mon Jun 4 09:23:52 PDT 2012


Salut Duncan,

On Sun, Jun 3, 2012 at 7:55 AM, Duncan Sands <baldrick at free.fr> wrote:
> Hi,
>
>>> The problem is that the existing integer arithmetic operations on i8
>>> are not legal to be executed on the predicate registers (i.e., clang
>>> would generate an i8 expression for the addition of two char
>>> variables.)  Hexagon cannot do integer arithmetic operations using the
>>> predicate registers.
>
> so what can you actually do with predicate registers?

Hexagon can use predicate registers to do boolean arithmetic,
and code predication.

Sebastian
--
Qualcomm Innovation Center, Inc is a member of Code Aurora Forum




More information about the llvm-dev mailing list