[LLVMdev] MachineOperand: Subreg defines and the Undef flag

[Pranav Bhandarkar]

Hi Jakob,

Thanks for your reply.
> 
> The <undef> flag goes on NewMI_1 because the virtual register B isn't live
> before that instruction.
> 
> But you probably shouldn't be doing this yourself. Your NewMI code isn't
in
> SSA form because B has multiple definitions. Just use a REG_SEQUENCE
> instruction, and let the register allocator do the transformation for you.

Aaargh. So you mean something like  this ?

New_MI_1:: Vreg1 = 0                                    ; Vreg1 and Vreg2
are 32 bit virt. regs.
New_MI_2:: Vreg2 = COPY C:lo_sub_reg.
New_MI_3:: B= REG_SEQUENCE<Vreg1, hi_sub_reg, Vreg2, lo_sub_reg>  ; B is a
64 bit virt reg.

TIA,
Pranav