[LLVMdev] extending the LLVM assembler: more than one linkage "type"?
patrik.h.hagglund at ericsson.com
Wed Feb 8 04:49:10 PST 2012
On our target, we want to add a new linkage type "attribute" (or
something similar), orthogonal to the linkage types used. However, I see
that only _one_ linkage type can be specified for each function (despite
the composite nature of some of the existing linkage types).
Should I duplicate all linkage types that we use (for example, like weak
and linkonce are duplicated into weak_odr and linkonce_odr), or are
there some other option?
In more detail: We have a frontend pragma that controls if calls for a
given function declaration should be absolute, instead of PC-relative
(which is the default). This affects some aspects of the linkage
process. How should the LLVM assembler be extended to pass this information?
More information about the llvm-dev